| Class Number | Date | Topic | Assignment |
|---|---|---|---|
| 1 | August 31 | The von Neumann Architecture.
The Memory Hierarchy. | Read Chapter 1
Review the [ Units of Measure handout ]. [ Send me email with your name and ID number in the body of the message. Send the message to vickery at qc dot edu with "CS-341 E8TPA Student" in the Subject line. Be sure to use your own account and that the account will remain valid for the entire semester. |
| 2 | September 5 | Three Tricks.
Audio Information Encoding | |
| 3 | September 7 | Time to execute a program.
Comparing computer speeds. Information Theory. | |
| 4 | September 12 | Information Encoding: Audio | Homework 1 Due
Chapter 1 Exercises 1, 2, 5, 6, 9, 10, 11, and 12. [ Audio Encoding Exercise ] |
| 5 | September 14 | Information Encoding: CRT Images | |
| 6 | September 19 | Text Codes | |
| 7 | September 21 | Parity and Hamming Codes | Read Appendix A |
| 8 | September 26 | Signed integer codes | Homework 2 Due
Chapter 2 Exercises 1, 2, 3, 6, 8, 9, 10, 11, 13, 14, 28, 34. Optional: Exercises 35 and or 36. Read Appendix B [ Floating-Point Calculators ] |
| 9 | September 28 | Two's complement carry and overflow.
Floating-point | |
| 10 | October 3 | Disks and CDs. | Homework 3 Due
Chapter 2 Exercises 18, 19, 20, 21, 22, 24, 25, 26 Appendix A Exercises 1, 2, 3, 4, 7, 9, 10, 11, 12 Appendix B Exercises 1, 2, 5 |
| 11 | October 5 | *** Exam 1 *** | |
| October 10 | No Class (Monday Schedule) | ||
| 12 | October 12 | Introduction to Gates and Logic Design | Read Chapter 3. |
| 13 | October 17 | Exam post-mortem.
Decoders and Multiplexers. | Homework 4 Due
Chapter 3, Exercises 3, 4, 5, 6, 7, 8. |
| 14 | October 19 | Multiplexers implement logic functions.
Minimization. | |
| 15 | October 24 | Minimization continued. | Homework 5 Due
Chapter 3, Exercises 14, 15, 16, 17, 18 |
| 16 | October 26 | Programmable Logic Devices. | Homework 5a Due
Show that the truth table with minterms 1, 2, 4, 5, 6, and 7 reduces to (!bc + b!c + a) by algebra and using a Karnaugh Map. |
| 17 | October 31 | Programmable Logic Devices, continued.
ALU Design. | |
| October 31 | Last Day to Withdraw With No Grade Assigned | ||
| 18 | November 2 | ALU Design continued. | [ Pictures of the Blackboard ] |
| 19 | November 7 | Carry Lookahead Logic
NOR Latch Operation | |
| 20 | November 9 | Clocked Latch Design
Datapath Clocking | Homework 6 Due
Chapter 3, Exercises 19, 20, 22, 23, 24 |
| 21 | November 14 | Flip-Flops
SRAM Design | |
| 22 | November 16 | *** Exam 2 ***
[ Minimization Web Page ] [ Study Guide ] | |
| 23 | November 21 | Memory Structures | Homework 7 Due |
| November 23 | No Class (Thanksgiving) | ||
| 24 | November 28 | Bus timing for memory read. | |
| 25 | November 30 | Busses and I/O Interfacing | |
| 26 | December 5 | I/O, Interrupts, and DMA | |
| 27 | December 7 | Control of IJVM Data Path | |
| 28 | December 12 | Review for Final Exam | |
| December 19 | *** Final Exam ***
8:30 PM to 10:30 PM [ Study Guide ] | ||
| December 22 | [ Extra Credit Assignment ] Due | ||